This application claims the priority of Korean Patent Application No. 2002-55995, filed Sep. 14, 2002, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates to a panel circuit structure for an active matrix organic light emitting diode display, capable of reducing current nonuniformities between pixels and nonuniformity in the brightness of the display.
2. Description of the Related Art
Conventionally, an active matrix organic light emitting diode panel circuit structure, as shown in FIG. 1, is widely known, where a plurality of pixels, each of which includes two thin film transistors, a capacitor, and an organic light emitting diode (OLED), are arranged in rows and columns.
As is well known, in the conventional active matrix OLED panel circuit, upon selection of a scan line 100 a video signal loaded in a data line 101 is input to a driving transistor 112 via an addressing transistor 111 to control the current through an OLED 130. The video signal is stored in a storage capacitor 120 for one frame time duration.
Most thin film transistors (TFTs), such as the addressing transistor 111 and the driving transistor 112 of FIG. 1, used in active matrix OLED display panels are formed using polysilicon. Threshold voltage variation in such a TFT leads to current nonuniformities between pixels and nonuniform brightness. These problems are not significant in gray-scale displays smaller than 2 inches. A larger display undergoes more serious threshold nonuniformities, and the quality of the display greatly degrades.
FIG. 2 shows an example of a pixel structure suggested for threshold voltage nonuniformity compensation in a polysilicon TFT, in which a plurality of pixels each including four TFTs, two capacitors, and an OLED are arranged in rows and columns. Referring to FIG. 2, upon selection of a scan line 200, a video signal loaded in a data line 203 is input to a driving transistor 212 via an addressing transistor 211 to control the current through an OLED 230. The video signal is stored in a storage capacitor 222 for one frame time duration. In FIG. 2, reference numerals 201 and 202 denote an auto zero line and an illuminate line, respectively. Reference numerals 213 and 214 denote a transistor whose gate is connected to the auto zero line 201 and a transistor whose gate is connected to the illuminate line 202, respectively. A capacitor 221 is located between the drain of the addressing transistor 211 and the gate of the driving transistor 212. The application of this pixel structure eliminates the threshold voltage nonuniformity in the driving transistor 212, and thus gray-scale display can be implemented. However, the increase in the number of TFTs constituting one pixel to four reduces panel yield and the illumination area of each pixel. As a result, the brightness of the display decreases. Moreover, the current density in the OLED increases, thereby shortening the lifetime of the display.